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| author | Simon Horman <horms+renesas@verge.net.au> | 2013-08-06 17:56:43 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-08-06 17:56:43 +0900 |
| commit | 21c7a134051f2f753d359a02923223ad9181da31 (patch) | |
| tree | 15b4e72ba4f159ad3ca4e00540b19e8715243d2a /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 81b9d5351fa96caad4accc6711bc1b9342927d4a (diff) | |
| parent | 93d8a6fbe69a629a7bb37bb546699a5c49963dc5 (diff) | |
Merge tag 'renesas-fixes-for-v3.12' into soc2-base
Renesas ARM based SoC fixes for v3.12
* Fix TPU clock name for r8a7740 SoC
* Update romImage to relocate appended DTB
* Thumb fixes
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
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