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author | Marek Olšák <marek.olsak@amd.com> | 2014-03-22 16:20:43 +0100 |
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committer | Christian König <christian.koenig@amd.com> | 2014-03-25 13:13:24 +0100 |
commit | 020ff5467603483a97042625d12696c9b39922cf (patch) | |
tree | 65d3a519d0b8ea32867f0be26cf8d6969d032113 /tools/perf/scripts/python/event_analyzing_sample.py | |
parent | ab8f1a2a0a7a9882e1214e4f5107e2a02705d11e (diff) |
drm/radeon: set PIPE_CONFIG for 1D and linear tiling modes on CIK
This fixes fast color clear with 1D-tiled single-sample surfaces
and Hyper-Z corruption with 1D-tiled depth surfaces.
Even though it seems it is not needed for 1D tiling, CMASK and HTILE are
always 2D-tiled, thus the hw needs to know the actual pipe configuration
for CMASK and HTILE addressing no matter what the tiling mode of the surface
is.
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions