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| author | Chen-Yu Tsai <wens@csie.org> | 2014-06-26 23:55:41 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-07-04 12:05:12 +0200 |
| commit | 9a5e6c7eb5ccbb5f0d3a1dffce135f0a727f40e1 (patch) | |
| tree | 283615dde84a477cae1909b831be8778867ad342 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 70eab199fa39cb78e13d369db55f24a3839b8f9e (diff) | |
clk: sunxi: Support factor clocks with N factor starting not from 0
The PLLs on newer Allwinner SoC's, such as the A31 and A23, have a
N multiplier factor that starts from 1, not 0.
This patch adds an option to the factor clk driver's config data
structures to specify the base value of N.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions