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authorGustavo Padovan <gustavo.padovan@collabora.co.uk>2014-09-24 14:20:22 -0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-10-24 16:33:59 +0200
commitccc759dc2a0214fd8b65ed4ebe78050874a67f94 (patch)
tree0d71d2cb875fa90f9b9f4dfa21d83fd0d1be1558 /tools/perf/scripts/python/event_analyzing_sample.py
parentd68a08af3d112064b35c5d6eaa582379c5057fa8 (diff)
drm/i915: Merge of visible and !visible paths for primary planes
Fold intel_pipe_set_base() in the update primary plane path merging pieces of code that are common to both paths. Basically the the pin/unpin procedures are the same for both paths and some checks can also be shared (some of the were moved to the check() stage) v2: take Ville's comments: - remove unnecessary plane check - move mutex lock to inside the conditional - make the pin fail message a debug one - add a fixme for the fastboot hack - call intel_frontbuffer_flip() after FBC update v3: take more Ville's comments: - fold update code under if (intel_crtc->active), and do the visible/!visible split inside. - check ret inside the same conditional we assign it v4: don't use intel_enable_primary_hw_plane(), the primary_enabled check inside will break page flips v5: take more Ville's comments: - set primary_enabled to true and add BDW hack - unify if (old_fb) and if (old_fb != fb) v6: take more Ville's comments: - make was_primary bool and fix its check - add the BDW vblank wait comment Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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