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| author | Emilio López <emilio@elopez.com.ar> | 2013-03-27 18:20:38 -0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2013-04-04 23:41:47 +0200 |
| commit | 07c60ef775568d2190f93786c464e30696c10b95 (patch) | |
| tree | 2293aaea698504ca782600f442506c43edad18a2 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | 23b5cf31fe5fd1f787f0101ede4ab4fb43e12371 (diff) | |
arm: sunxi: Add clock definitions for AXI, AHB, APB0, APB1 gates
This commit adds the corresponding DT bindings for all the AXI,
AHB, APB0 and APB1 gates.
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions