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authorBen Widawsky <benjamin.widawsky@intel.com>2013-10-02 09:25:02 -0700
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-10-03 20:01:29 +0200
commitf6aca45c060d43db083a5ae34ac6ad3bbefe81da (patch)
tree3946e8afa8c87fbcef32df81798868ebb61480b3 /tools/perf/scripts/python/failed-syscalls-by-pid.py
parente41a56be017c6e2891603c678ef2187c437d4414 (diff)
drm/i915: Clean up the ring scaling calculations
This patch attempts to clean up the ring/IA scaling programming in the following ways. 1. Fix the comment about the DDR frequency. The math is 266MHz, not 133MHz. Formula was right, docs are wrong. 2. Mask the DCLK register since I don't know how it is defined on future platforms. 3. use mult_frac instead of magic math. This helps for future platform enabling. v2: Actually use the right patch. The v1 was a mix of things, none of which was right. Note that due to rounding, we actually get different values (slightly higher) for the effective ring frequency. v3: Use 1.25 instead of 1.33 as the original code did. (Jesse) CC: Jesse Barnes <jbarnes@virtuousgeek.org> CC: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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