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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-06-05 13:34:32 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-07-12 18:54:01 +0200 |
| commit | 3ad8a208abbe1bdfe31512053a81ac4938aed447 (patch) | |
| tree | 1aed9fa56eb80e22a5e93c613bef141323121ed0 /tools/perf/scripts/python/net_dropmonitor.py | |
| parent | 426115cf5dd81d17a6322c493ca337e637ce2aed (diff) | |
drm/i915: Fix up cpt pixel multiplier enable sequence
Bspec for the "DPLL HDMI multiplier" field says:
"Restriction : The DPLL must be enabled and stable before setting these bits.
These bits must be programmed after DPLL_SEL is programmed."
There is apparently no restriction on programming the DPLL_SEL
register wrt the DPLL. So let's just move that up before we enable the
pch dpll.
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/net_dropmonitor.py')
0 files changed, 0 insertions, 0 deletions