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| author | Will Deacon <will.deacon@arm.com> | 2013-01-16 12:01:59 +0000 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2013-01-16 12:01:59 +0000 |
| commit | 40c390c768f898497e17d934f6715d516ff67294 (patch) | |
| tree | 87f49311dfb80e19d790fa76f97ceed0536e7628 /tools/perf/scripts/python/netdev-times.py | |
| parent | 1764c591dfed2ce7075465df0591ce9564ff37a1 (diff) | |
ARM: perf: don't pretend to support counting of L1I writes
ARM has a harvard cache architecture and cannot write directly to the
I-side.
This patch removes the L1I write events from the cache map (which
previously returned *read* events in many cases).
Reported-by: Mike Williams <michael.williams@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions