diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2014-05-08 12:01:48 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2014-05-22 15:37:24 +0530 |
| commit | d2f78e95e42a9130002c76f1a1f76e657a4b4004 (patch) | |
| tree | ba270d4a8ca0666bd753f3bad9088a113730452a /tools/perf/scripts/python/netdev-times.py | |
| parent | fbeb91fe8e4107dc88df4eaa21de02c3fd9d1cd5 (diff) | |
dmaengine: dw: enable clock before access
hclk signal is a bus clock. So, it means we have to have it enabled during
access to the DMA controller. This patch makes sure that we enable clock before
access to the device, though it currently works on Intel hardware.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/netdev-times.py')
0 files changed, 0 insertions, 0 deletions