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| author | Roy Spliet <r.spliet@student.tudelft.nl> | 2011-03-27 18:13:11 +0200 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2011-05-16 10:47:43 +1000 |
| commit | 50066f8117d79163b96d3bf778c41961be1fe5cd (patch) | |
| tree | a3425c1d9108768fac80d3e2fc508d3babeb2023 /tools/perf/scripts/python/sched-migration.py | |
| parent | 7795bee0c437aff7fb188afe750fe79a7a971a2c (diff) | |
drm/nouveau: improve memtiming table parsing
Improves the parsing of the memory timing table on NV50-NV98revA1 chipsets.
Added stepping to drm_nouveau_private to make sure newer NV98 (105M) is
zero rather than incorrect.
Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/sched-migration.py')
0 files changed, 0 insertions, 0 deletions