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authorDinh Nguyen <dinguyen@altera.com>2014-01-06 20:54:43 -0600
committerDinh Nguyen <dinguyen@altera.com>2014-01-08 11:58:44 -0600
commit9a21e55d77ab909b36c2c730e5a1e1d1a9a57c5e (patch)
tree26eb53d1f48b4cf67b0725b8b9dc094c5b7064bd /tools/perf/scripts/python/sched-migration.py
parent374b105797c3d4f29c685f3be535c35f5689b30e (diff)
ARM: dts: socfpga: update L2 tag and data latency
Sets the appropriate L2-cache latencies for the SOCFPGA platform. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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