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authorHeiko Stuebner <heiko@sntech.de>2013-03-18 13:43:52 +0900
committerKukjin Kim <kgene.kim@samsung.com>2013-03-28 14:46:03 +0900
commit798ed613f5db7f61a7773412b9a6bc3d37d17ecb (patch)
tree1fb1a600a39cf0a74963f59f859e9b04b14879c0 /tools/perf/scripts/python/syscall-counts.py
parent8b6076d47ff820d1dc7a9aa37c712b561f316a78 (diff)
clk: samsung: register clk_div_tables for divider clocks
On some Samsung platforms divider clocks only use specific divider combinations like the armdiv on s3c2443 and s3c2416. For these usecases the generic divider clock already provides the option of providing a lookup table mapping register values to divider values. Therefore add a new field to samsung_div_clock and if filled with a table, use clk_register_divider_table instead of clk_register_divider to register a divider clock Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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