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| author | Boris BREZILLON <boris.brezillon@free-electrons.com> | 2014-09-02 09:50:16 +0200 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2014-09-02 15:37:17 -0700 |
| commit | 87e2ed338f1b56798807ccf12eb6112d25062202 (patch) | |
| tree | 3547acba47040ac108b4ecb02a3c414aa1ed1ada /tools/perf/scripts/python/syscall-counts.py | |
| parent | 3ef9dd2bab7d6a013f75f9fb226d0191e9981288 (diff) | |
clk: at91: fix recalc_rate implementation of PLL driver
Use the cached values to calculate PLL rate instead of the register values.
This is required to prevent erroneous PLL rate return when the PLL rate
has been configured but the PLL is not prepared yet.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reported-by: Gaël PORTAY <gael.portay@gmail.com>
Tested-by: Gaël PORTAY <gael.portay@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions