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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-01-24 15:29:32 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-01-24 22:34:37 +0100 |
| commit | aab17139a0eec686bad80579f7a5d6969c998392 (patch) | |
| tree | baa9d925d04f8b1d74a03eedcb248a68917c7ddc /tools/perf/scripts/python/syscall-counts.py | |
| parent | b906487c515711d79e31ceb9fe75738574b5c3a2 (diff) | |
drm/i915: PIPE M/N registers need an offset on VLV
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions