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| author | Damien Lespiau <damien.lespiau@intel.com> | 2013-11-02 21:07:51 -0700 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-08 18:10:01 +0100 |
| commit | e3c3357863db7cb8e847b3adff5b6be94cecde82 (patch) | |
| tree | 8cd162a97fa83021546ca14cf226d2141bc3155f /tools/perf/scripts/python/syscall-counts.py | |
| parent | 0f161f7075a61700b973562b17ae9339357a5b2e (diff) | |
drm/i915/bdw: Broadwell has a max port clock of 300Mhz on HDMI
Just like HSW.
This means we can scan out a mode with a 300Mhz pixel clock with a depth
of 24 bits, but only a 200Mhz one with a 36bits depth.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions