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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-03-28 23:29:31 +0200
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-03-31 10:46:32 +0200
commitefc2cfff28a9424a0f9f8b068c6c8697435664c3 (patch)
tree51ab2160920e3df0fd24cd3f9cf086146d5013c9 /tools/perf/scripts/python/syscall-counts.py
parent609aeacaacd9db3d7abb2eb4d2ff8e62af8ce283 (diff)
drm/i915: Fix the interlace mode selection for gmch platforms
PIPECONF_INTERLACE_W_FIELD_INDICATION is only meant to be used for sdvo since it implies a slightly weird vsync shift of htotal/2. For everything else we should use PIPECONF_INTERLACE_W_SYNC_SHIFT and let the value in the VSYNCSHIFT register take effect. The only exception is gen3 simply because VSYNCSHIFT didn't exist yet. Gen2 doesn't support interlaced modes at all, so we can drop the explicit gen2 checks. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/syscall-counts.py')
0 files changed, 0 insertions, 0 deletions