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| author | Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> | 2013-12-16 11:24:13 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-03-26 23:09:18 +0100 |
| commit | 41e62b0411d84e3d92deac79b83b0bacca4b9a52 (patch) | |
| tree | 563a98f0d83d77c4b3d414651646ef55c1cc9815 /tools/perf/scripts/python | |
| parent | ca750649e08ce37bd3873e1026dc245811adf7a8 (diff) | |
MIPS: asm: r4kcache: Build flushing code for instruction cache
Build code to invalidate an address range in the instruction cache
using the Hit Invalidate cache operation.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions