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authorRongjun Ying <rongjun.ying@csr.com>2014-01-30 13:54:24 +0800
committerLinus Walleij <linus.walleij@linaro.org>2014-02-10 10:13:08 +0100
commit58ffe7a02583bd19bb83c8bc7e277705625316a2 (patch)
treeb90cdd0d276daa627c8a2aa241cb35250f7f5256 /tools/perf/scripts/python
parent4bd7547756af5c71d55e4d77f41db3d06c18b3e0 (diff)
pinctrl: sirf: add pin group for USP0 for atlas6
USP0 has multiple functions, and has RX and TX frame sync signals, for some scenarios like audio PCM, we don't need both of them. so here we add two possibilities for USP0 only holding one of TX and RX frame sync. commit 8385af02bad only added this group for prima2, and missed atlas6. This patch fixes it. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python')
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