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| author | Bjorn Helgaas <bhelgaas@google.com> | 2012-12-05 13:51:17 -0700 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2012-12-05 13:51:17 -0700 |
| commit | 7793eeabc89fd342b96fdadce5a50c46ab77f3f9 (patch) | |
| tree | a4b3e65fcb4dda9043bf70ced68e961b3f2500b1 /tools/perf/scripts/python | |
| parent | 8f0d8163b50e01f398b14bcd4dc039ac5ab18d64 (diff) | |
PCI: Add and use standard PCI-X Capability register names
Add and use #defines for PCI-X Capability registers and fields.
Note that the PCI-X Capability has a different layout for
type 0 (endpoint) and type 1 (bridge) devices.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions