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authorSuzuki K. Poulose <suzuki.poulose@arm.com>2014-12-17 15:50:21 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2015-01-23 15:47:16 +0000
commit9f71ac961be8d44ad9d7742a5d1129577514660d (patch)
treefbcbb802f89ec152b32ea3908decdbe5a58ad9f7 /tools/perf/scripts/python
parentda1f2b82054c171166ca0069cd60aa9300127cf1 (diff)
arm64: Fix SCTLR_EL1 initialisation
We initialise the SCTLR_EL1 value by read-modify-writeback of the desired bits, leaving the other bits (including reserved bits(RESx)) untouched. However, sometimes the boot monitor could leave garbage values in the RESx bits which could have different implications. This patch makes sure that all the bits, including the RESx bits, are set to the proper state, except for the 'endianness' control bits, EE(25) & E0E(24)- which are set early in the el2_setup. Updated the state of the Bit[6] in the comment to RES0 in the comment. Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'tools/perf/scripts/python')
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