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authorBoojin Kim <boojin.kim@samsung.com>2012-06-27 09:45:42 +0900
committerKukjin Kim <kgene.kim@samsung.com>2012-06-27 09:45:42 +0900
commitc8dd5110dead436b178bb2d8976290fd5f77a2ee (patch)
tree549e13c908561307b6c42afdb84558f888112144 /tools/perf/scripts/python
parent65ab16fd385f72baf556fcebe5118d8b6f256ace (diff)
ARM: EXYNOS: Remove the L2 cache latency setting for EXYNOS5
Since SYSRAM set the L2 cache latency on EXYNOS5 SoCs, no longer need that in the kernel. It helps to reduce booting time (no need cache disable and cache enable). Signed-off-by: Boojin Kim <boojin.kim@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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