diff options
| -rw-r--r-- | arch/m68k/include/asm/m5206sim.h | 4 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m5249sim.h | 2 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m5307sim.h | 2 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m5407sim.h | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h index 02a91f489cb..c78ff10c015 100644 --- a/arch/m68k/include/asm/m5206sim.h +++ b/arch/m68k/include/asm/m5206sim.h @@ -85,9 +85,9 @@ #define MCFSIM_DMCR 0xc6 /* Default control */ #ifdef CONFIG_M5206e -#define MCFSIM_PAR 0xca /* Pin Assignment reg (r/w) */ +#define MCFSIM_PAR (MCF_MBAR + 0xca) /* Pin Assignment */ #else -#define MCFSIM_PAR 0xcb /* Pin Assignment reg (r/w) */ +#define MCFSIM_PAR (MCF_MBAR + 0xcb) /* Pin Assignment */ #endif #define MCFTIMER_BASE1 (MCF_MBAR + 0x100) /* Base of TIMER1 */ diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h index 7229fd87234..6e2bb0c5719 100644 --- a/arch/m68k/include/asm/m5249sim.h +++ b/arch/m68k/include/asm/m5249sim.h @@ -29,7 +29,7 @@ #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */ #define MCFSIM_SWIVR (MCF_MBAR + 0x02) /* SW Watchdog intr */ #define MCFSIM_SWSR (MCF_MBAR + 0x03) /* SW Watchdog srv */ -#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ +#define MCFSIM_PAR (MCF_MBAR + 0x04) /* Pin Assignment */ #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ #define MCFSIM_IPR (MCF_MBAR + 0x40) /* Interrupt Pending */ diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h index a328e1806fe..7d89d86144a 100644 --- a/arch/m68k/include/asm/m5307sim.h +++ b/arch/m68k/include/asm/m5307sim.h @@ -27,7 +27,7 @@ #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */ #define MCFSIM_SWIVR (MCF_MBAR + 0x02) /* SW Watchdog intr */ #define MCFSIM_SWSR (MCF_MBAR + 0x03) /* SW Watchdog service*/ -#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ +#define MCFSIM_PAR (MCF_MBAR + 0x04) /* Pin Assignment */ #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ #define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/ #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h index 023f5f64ccd..51111afc792 100644 --- a/arch/m68k/include/asm/m5407sim.h +++ b/arch/m68k/include/asm/m5407sim.h @@ -27,7 +27,7 @@ #define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */ #define MCFSIM_SWIVR (MCF_MBAR + 0x02) /* SW Watchdog intr */ #define MCFSIM_SWSR (MCF_MBAR + 0x03) /* SW Watchdog service*/ -#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ +#define MCFSIM_PAR (MCF_MBAR + 0x04) /* Pin Assignment */ #define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ #define MCFSIM_PLLCR 0x08 /* PLL Control Reg*/ #define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ |