diff options
| -rw-r--r-- | arch/m68k/include/asm/cacheflush_no.h | 7 | ||||
| -rw-r--r-- | arch/m68k/include/asm/m54xxacr.h | 38 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/Makefile | 2 | ||||
| -rw-r--r-- | arch/m68knommu/platform/coldfire/cache.c | 48 |
4 files changed, 56 insertions, 39 deletions
diff --git a/arch/m68k/include/asm/cacheflush_no.h b/arch/m68k/include/asm/cacheflush_no.h index 8ada4ffc98e..f931e182983 100644 --- a/arch/m68k/include/asm/cacheflush_no.h +++ b/arch/m68k/include/asm/cacheflush_no.h @@ -30,9 +30,13 @@ #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) -#ifndef __flush_cache_all +void mcf_cache_push(void); + static inline void __flush_cache_all(void) { +#ifdef CACHE_PUSH + mcf_cache_push(); +#endif #ifdef CACHE_INVALIDATE __asm__ __volatile__ ( "movel %0, %%d0\n\t" @@ -41,6 +45,5 @@ static inline void __flush_cache_all(void) : : "i" (CACHE_INVALIDATE) : "d0" ); #endif } -#endif /* __flush_cache_all */ #endif /* _M68KNOMMU_CACHEFLUSH_H */ diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h index 3c81a7a34a8..6bce82fdb9c 100644 --- a/arch/m68k/include/asm/m54xxacr.h +++ b/arch/m68k/include/asm/m54xxacr.h @@ -83,46 +83,12 @@ #define ACR2_MODE (0x000f0000+INSN_CACHE_MODE) #define ACR3_MODE 0 -#ifndef __ASSEMBLY__ - #if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_WT) #define flush_dcache_range(a, l) do { asm("nop"); } while (0) #endif - -static inline void __m54xx_flush_cache_all(void) -{ - __asm__ __volatile__ ( #if ((DATA_CACHE_MODE & ACR_CM) == ACR_CM_CP) - /* - * Use cpushl to push and invalidate all cache lines. - * Gas doesn't seem to know how to generate the ColdFire - * cpushl instruction... Oh well, bit stuff it for now. - */ - "clrl %%d0\n\t" - "1:\n\t" - "movel %%d0,%%a0\n\t" - "2:\n\t" - ".word 0xf468\n\t" - "addl %0,%%a0\n\t" - "cmpl %1,%%a0\n\t" - "blt 2b\n\t" - "addql #1,%%d0\n\t" - "cmpil %2,%%d0\n\t" - "bne 1b\n\t" +/* Copyback cache mode must push dirty cache lines first */ +#define CACHE_PUSH #endif - "movel %3,%%d0\n\t" - "movec %%d0,%%CACR\n\t" - "nop\n\t" /* forces flush of Store Buffer */ - : /* No output */ - : "i" (CACHE_LINE_SIZE), - "i" (DCACHE_SIZE / CACHE_WAYS), - "i" (CACHE_WAYS), - "i" (CACHE_INVALIDATE) - : "d0", "a0" ); -} - -#define __flush_cache_all() __m54xx_flush_cache_all() - -#endif /* __ASSEMBLY__ */ #endif /* m54xxacr_h */ diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile index 53a27e1a790..a8967baabd7 100644 --- a/arch/m68knommu/platform/coldfire/Makefile +++ b/arch/m68knommu/platform/coldfire/Makefile @@ -14,7 +14,7 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 -obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o +obj-$(CONFIG_COLDFIRE) += cache.o clk.o dma.o entry.o vectors.o obj-$(CONFIG_M5206) += timers.o intc.o obj-$(CONFIG_M5206e) += timers.o intc.o obj-$(CONFIG_M520x) += pit.o intc-simr.o diff --git a/arch/m68knommu/platform/coldfire/cache.c b/arch/m68knommu/platform/coldfire/cache.c new file mode 100644 index 00000000000..235d3c4f4f0 --- /dev/null +++ b/arch/m68knommu/platform/coldfire/cache.c @@ -0,0 +1,48 @@ +/***************************************************************************/ + +/* + * cache.c -- general ColdFire Cache maintainence code + * + * Copyright (C) 2010, Greg Ungerer (gerg@snapgear.com) + */ + +/***************************************************************************/ + +#include <linux/kernel.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> + +/***************************************************************************/ +#ifdef CACHE_PUSH +/***************************************************************************/ + +/* + * Use cpushl to push all dirty cache lines back to memory. + * Older versions of GAS don't seem to know how to generate the + * ColdFire cpushl instruction... Oh well, bit stuff it for now. + */ + +void mcf_cache_push(void) +{ + __asm__ __volatile__ ( + "clrl %%d0\n\t" + "1:\n\t" + "movel %%d0,%%a0\n\t" + "2:\n\t" + ".word 0xf468\n\t" + "addl %0,%%a0\n\t" + "cmpl %1,%%a0\n\t" + "blt 2b\n\t" + "addql #1,%%d0\n\t" + "cmpil %2,%%d0\n\t" + "bne 1b\n\t" + : /* No output */ + : "i" (CACHE_LINE_SIZE), + "i" (DCACHE_SIZE / CACHE_WAYS), + "i" (CACHE_WAYS) + : "d0", "a0" ); +} + +/***************************************************************************/ +#endif /* CACHE_PUSH */ +/***************************************************************************/ |