diff options
Diffstat (limited to 'arch/arm/mach-mv78xx0/include')
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/debug-macro.S | 20 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/dma.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/entry-macro.S | 39 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/hardware.h | 21 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/io.h | 26 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/irqs.h | 91 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/memory.h | 14 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/mv78xx0.h | 126 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/system.h | 37 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/timex.h | 9 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/uncompress.h | 47 | ||||
| -rw-r--r-- | arch/arm/mach-mv78xx0/include/mach/vmalloc.h | 5 |
12 files changed, 436 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S new file mode 100644 index 00000000000..a06442fbd34 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S @@ -0,0 +1,20 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/debug-macro.S + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <mach/mv78xx0.h> + + .macro addruart,rx + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + ldreq \rx, =MV78XX0_REGS_PHYS_BASE + ldrne \rx, =MV78XX0_REGS_VIRT_BASE + orr \rx, \rx, #0x00012000 + .endm + +#define UART_SHIFT 2 +#include <asm/hardware/debug-8250.S> diff --git a/arch/arm/mach-mv78xx0/include/mach/dma.h b/arch/arm/mach-mv78xx0/include/mach/dma.h new file mode 100644 index 00000000000..40a8c178f10 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/dma.h @@ -0,0 +1 @@ +/* empty */ diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S new file mode 100644 index 00000000000..ed4a46bcd3b --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S @@ -0,0 +1,39 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for Marvell MV78xx0 platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <mach/mv78xx0.h> + + .macro disable_fiq + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_preamble, base, tmp + ldr \base, =IRQ_VIRT_BASE + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + @ check low interrupts + ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] + ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] + mov \irqnr, #31 + ands \irqstat, \irqstat, \tmp + + @ if no low interrupts set, check high interrupts + ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] + ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] + moveq \irqnr, #63 + andeqs \irqstat, \irqstat, \tmp + + @ find first active interrupt source + clzne \irqstat, \irqstat + subne \irqnr, \irqnr, \irqstat + .endm diff --git a/arch/arm/mach-mv78xx0/include/mach/hardware.h b/arch/arm/mach-mv78xx0/include/mach/hardware.h new file mode 100644 index 00000000000..5d887557e12 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/hardware.h @@ -0,0 +1,21 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/hardware.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include "mv78xx0.h" + +#define pcibios_assign_all_busses() 1 + +#define PCIBIOS_MIN_IO 0x00001000 +#define PCIBIOS_MIN_MEM 0x01000000 +#define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */ + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/io.h b/arch/arm/mach-mv78xx0/include/mach/io.h new file mode 100644 index 00000000000..450e0e1ad09 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/io.h @@ -0,0 +1,26 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/io.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_IO_H +#define __ASM_ARCH_IO_H + +#include "mv78xx0.h" + +#define IO_SPACE_LIMIT 0xffffffff + +static inline void __iomem *__io(unsigned long addr) +{ + return (void __iomem *)((addr - MV78XX0_PCIE_IO_PHYS_BASE(0)) + + MV78XX0_PCIE_IO_VIRT_BASE(0)); +} + +#define __io(a) __io(a) +#define __mem_pci(a) (a) + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h new file mode 100644 index 00000000000..995d7fb8d06 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h @@ -0,0 +1,91 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/irqs.h + * + * IRQ definitions for Marvell MV78xx0 SoCs + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +#include "mv78xx0.h" /* need GPIO_MAX */ + +/* + * MV78xx0 Low Interrupt Controller + */ +#define IRQ_MV78XX0_ERR 0 +#define IRQ_MV78XX0_SPI 1 +#define IRQ_MV78XX0_I2C_0 2 +#define IRQ_MV78XX0_I2C_1 3 +#define IRQ_MV78XX0_IDMA_0 4 +#define IRQ_MV78XX0_IDMA_1 5 +#define IRQ_MV78XX0_IDMA_2 6 +#define IRQ_MV78XX0_IDMA_3 7 +#define IRQ_MV78XX0_TIMER_0 8 +#define IRQ_MV78XX0_TIMER_1 9 +#define IRQ_MV78XX0_TIMER_2 10 +#define IRQ_MV78XX0_TIMER_3 11 +#define IRQ_MV78XX0_UART_0 12 +#define IRQ_MV78XX0_UART_1 13 +#define IRQ_MV78XX0_UART_2 14 +#define IRQ_MV78XX0_UART_3 15 +#define IRQ_MV78XX0_USB_0 16 +#define IRQ_MV78XX0_USB_1 17 +#define IRQ_MV78XX0_USB_2 18 +#define IRQ_MV78XX0_CRYPTO 19 +#define IRQ_MV78XX0_SDIO_0 20 +#define IRQ_MV78XX0_SDIO_1 21 +#define IRQ_MV78XX0_XOR_0 22 +#define IRQ_MV78XX0_XOR_1 23 +#define IRQ_MV78XX0_I2S_0 24 +#define IRQ_MV78XX0_I2S_1 25 +#define IRQ_MV78XX0_SATA 26 +#define IRQ_MV78XX0_TDMI 27 + +/* + * MV78xx0 High Interrupt Controller + */ +#define IRQ_MV78XX0_PCIE_00 32 +#define IRQ_MV78XX0_PCIE_01 33 +#define IRQ_MV78XX0_PCIE_02 34 +#define IRQ_MV78XX0_PCIE_03 35 +#define IRQ_MV78XX0_PCIE_10 36 +#define IRQ_MV78XX0_PCIE_11 37 +#define IRQ_MV78XX0_PCIE_12 38 +#define IRQ_MV78XX0_PCIE_13 39 +#define IRQ_MV78XX0_GE00_SUM 40 +#define IRQ_MV78XX0_GE00_RX 41 +#define IRQ_MV78XX0_GE00_TX 42 +#define IRQ_MV78XX0_GE00_MISC 43 +#define IRQ_MV78XX0_GE01_SUM 44 +#define IRQ_MV78XX0_GE01_RX 45 +#define IRQ_MV78XX0_GE01_TX 46 +#define IRQ_MV78XX0_GE01_MISC 47 +#define IRQ_MV78XX0_GE10_SUM 48 +#define IRQ_MV78XX0_GE10_RX 49 +#define IRQ_MV78XX0_GE10_TX 50 +#define IRQ_MV78XX0_GE10_MISC 51 +#define IRQ_MV78XX0_GE11_SUM 52 +#define IRQ_MV78XX0_GE11_RX 53 +#define IRQ_MV78XX0_GE11_TX 54 +#define IRQ_MV78XX0_GE11_MISC 55 +#define IRQ_MV78XX0_GPIO_0_7 56 +#define IRQ_MV78XX0_GPIO_8_15 57 +#define IRQ_MV78XX0_GPIO_16_23 58 +#define IRQ_MV78XX0_GPIO_24_31 59 +#define IRQ_MV78XX0_DB_IN 60 +#define IRQ_MV78XX0_DB_OUT 61 + +/* + * MV78XX0 General Purpose Pins + */ +#define IRQ_MV78XX0_GPIO_START 64 +#define NR_GPIO_IRQS GPIO_MAX + +#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/memory.h b/arch/arm/mach-mv78xx0/include/mach/memory.h new file mode 100644 index 00000000000..9e47a140ff7 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/memory.h @@ -0,0 +1,14 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/memory.h + */ + +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#define PHYS_OFFSET UL(0x00000000) + +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h new file mode 100644 index 00000000000..ad664178d6e --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h @@ -0,0 +1,126 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/mv78xx0.h + * + * Generic definitions for Marvell MV78xx0 SoC flavors: + * MV781x0 and MV782x0. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_MV78XX0_H +#define __ASM_ARCH_MV78XX0_H + +/* + * Marvell MV78xx0 address maps. + * + * phys + * c0000000 PCIe Memory space + * f0800000 PCIe #0 I/O space + * f0900000 PCIe #1 I/O space + * f0a00000 PCIe #2 I/O space + * f0b00000 PCIe #3 I/O space + * f0c00000 PCIe #4 I/O space + * f0d00000 PCIe #5 I/O space + * f0e00000 PCIe #6 I/O space + * f0f00000 PCIe #7 I/O space + * f1000000 on-chip peripheral registers + * + * virt phys size + * fe400000 f102x000 16K core-specific peripheral registers + * fe700000 f0800000 1M PCIe #0 I/O space + * fe800000 f0900000 1M PCIe #1 I/O space + * fe900000 f0a00000 1M PCIe #2 I/O space + * fea00000 f0b00000 1M PCIe #3 I/O space + * feb00000 f0c00000 1M PCIe #4 I/O space + * fec00000 f0d00000 1M PCIe #5 I/O space + * fed00000 f0e00000 1M PCIe #6 I/O space + * fee00000 f0f00000 1M PCIe #7 I/O space + * fef00000 f1000000 1M on-chip peripheral registers + */ +#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 +#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 +#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 +#define MV78XX0_CORE_REGS_SIZE SZ_16K + +#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) +#define MV78XX0_PCIE_IO_VIRT_BASE(i) (0xfe700000 + ((i) << 20)) +#define MV78XX0_PCIE_IO_SIZE SZ_1M + +#define MV78XX0_REGS_PHYS_BASE 0xf1000000 +#define MV78XX0_REGS_VIRT_BASE 0xfef00000 +#define MV78XX0_REGS_SIZE SZ_1M + +#define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000 +#define MV78XX0_PCIE_MEM_SIZE 0x30000000 + +/* + * Core-specific peripheral registers. + */ +#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) +#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) +#define L2_WRITETHROUGH 0x00020000 +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SOFT_RESET 0x00000001 +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) +#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR (~0x0004) +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_LOW_OFF 0x0004 +#define IRQ_CAUSE_HIGH_OFF 0x0008 +#define IRQ_MASK_LOW_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) + +/* + * Register Map + */ +#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000) +#define DDR_WINDOW_CPU0_BASE (DDR_VIRT_BASE | 0x1500) +#define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE | 0x1700) + +#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x10000) +#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000) +#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030) +#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034) +#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) +#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) +#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) +#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) +#define UART2_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2200) +#define UART2_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2200) +#define UART3_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2300) +#define UART3_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2300) + +#define GE10_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x30000) +#define GE11_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x34000) + +#define PCIE00_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x40000) +#define PCIE01_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x44000) +#define PCIE02_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x48000) +#define PCIE03_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x4c000) + +#define USB0_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x50000) +#define USB1_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x51000) +#define USB2_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x52000) + +#define GE00_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x70000) +#define GE01_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x74000) + +#define PCIE10_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x80000) +#define PCIE11_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x84000) +#define PCIE12_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x88000) +#define PCIE13_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x8c000) + +#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000) + + +#define GPIO_MAX 32 + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h new file mode 100644 index 00000000000..7d517940883 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/system.h @@ -0,0 +1,37 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/system.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include <mach/hardware.h> +#include <mach/mv78xx0.h> + +static inline void arch_idle(void) +{ + cpu_do_idle(); +} + +static inline void arch_reset(char mode) +{ + /* + * Enable soft reset to assert RSTOUTn. + */ + writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); + + /* + * Assert soft reset. + */ + writel(SOFT_RESET, SYSTEM_SOFT_RESET); + + while (1) + ; +} + + +#endif diff --git a/arch/arm/mach-mv78xx0/include/mach/timex.h b/arch/arm/mach-mv78xx0/include/mach/timex.h new file mode 100644 index 00000000000..0e8c443c723 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/timex.h @@ -0,0 +1,9 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/timex.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#define CLOCK_TICK_RATE (100 * HZ) diff --git a/arch/arm/mach-mv78xx0/include/mach/uncompress.h b/arch/arm/mach-mv78xx0/include/mach/uncompress.h new file mode 100644 index 00000000000..365264298e7 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/uncompress.h @@ -0,0 +1,47 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/uncompress.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/serial_reg.h> +#include <mach/mv78xx0.h> + +#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) + +static void putc(const char c) +{ + unsigned char *base = SERIAL_BASE; + int i; + + for (i = 0; i < 0x1000; i++) { + if (base[UART_LSR << 2] & UART_LSR_THRE) + break; + barrier(); + } + + base[UART_TX << 2] = c; +} + +static void flush(void) +{ + unsigned char *base = SERIAL_BASE; + unsigned char mask; + int i; + + mask = UART_LSR_TEMT | UART_LSR_THRE; + + for (i = 0; i < 0x1000; i++) { + if ((base[UART_LSR << 2] & mask) == mask) + break; + barrier(); + } +} + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/arch/arm/mach-mv78xx0/include/mach/vmalloc.h b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h new file mode 100644 index 00000000000..1c4954386a8 --- /dev/null +++ b/arch/arm/mach-mv78xx0/include/mach/vmalloc.h @@ -0,0 +1,5 @@ +/* + * arch/arm/mach-mv78xx0/include/mach/vmalloc.h + */ + +#define VMALLOC_END 0xfe000000 |