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-rw-r--r--arch/mips/pci/fixup-ddb5074.c2
-rw-r--r--arch/mips/pci/fixup-ddb5477.c2
-rw-r--r--arch/mips/pci/fixup-malta.c2
-rw-r--r--arch/mips/pci/fixup-rbtx4927.c2
-rw-r--r--arch/mips/pci/fixup-sni.c2
-rw-r--r--arch/mips/pci/fixup-tb0219.c15
-rw-r--r--arch/mips/pci/ops-ddb5477.c4
-rw-r--r--arch/mips/pci/ops-tx4927.c6
-rw-r--r--arch/mips/pci/pci-ddb5477.c8
-rw-r--r--arch/mips/pci/pci-ip32.c2
-rw-r--r--arch/mips/pci/pci.c21
11 files changed, 34 insertions, 32 deletions
diff --git a/arch/mips/pci/fixup-ddb5074.c b/arch/mips/pci/fixup-ddb5074.c
index b345e528a53..5a4a7c239c4 100644
--- a/arch/mips/pci/fixup-ddb5074.c
+++ b/arch/mips/pci/fixup-ddb5074.c
@@ -5,7 +5,7 @@ static void ddb5074_fixup(struct pci_dev *dev)
{
extern struct pci_dev *pci_pmu;
u8 t8;
-
+
pci_pmu = dev; /* for LEDs D2 and D3 */
/* Program the lines for LEDs D2 and D3 to output */
pci_read_config_byte(dev, 0x7d, &t8);
diff --git a/arch/mips/pci/fixup-ddb5477.c b/arch/mips/pci/fixup-ddb5477.c
index 6abdc88bab1..2f1444e6065 100644
--- a/arch/mips/pci/fixup-ddb5477.c
+++ b/arch/mips/pci/fixup-ddb5477.c
@@ -65,7 +65,7 @@ static void ddb5477_amd_lance_fixup(struct pci_dev *dev)
ioaddr = pci_resource_start(dev, 0);
inw(ioaddr + PCNET32_WIO_RESET); /* reset chip */
-
+
/* bcr_18 |= 0x0800 */
outw(18, ioaddr + PCNET32_WIO_RAP);
temp = inw(ioaddr + PCNET32_WIO_BDP);
diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c
index b9296d9942b..bf2c41d1e9c 100644
--- a/arch/mips/pci/fixup-malta.c
+++ b/arch/mips/pci/fixup-malta.c
@@ -56,7 +56,7 @@ static void __init malta_piix_func0_fixup(struct pci_dev *pdev)
0, 0, 0, 3,
4, 5, 6, 7,
0, 9, 10, 11,
- 12, 0, 14, 15
+ 12, 0, 14, 15
};
int i;
diff --git a/arch/mips/pci/fixup-rbtx4927.c b/arch/mips/pci/fixup-rbtx4927.c
index de4e443da20..ceeb1860895 100644
--- a/arch/mips/pci/fixup-rbtx4927.c
+++ b/arch/mips/pci/fixup-rbtx4927.c
@@ -7,7 +7,7 @@
* Author: MontaVista Software, Inc.
* ppopov@mvista.com or source@mvista.com
*
- * Copyright (C) 2000-2001 Toshiba Corporation
+ * Copyright (C) 2000-2001 Toshiba Corporation
*
* Copyright (C) 2004 MontaVista Software Inc.
* Author: Manish Lachwani (mlachwani@mvista.com)
diff --git a/arch/mips/pci/fixup-sni.c b/arch/mips/pci/fixup-sni.c
index c8ef01a017c..a176f2ca865 100644
--- a/arch/mips/pci/fixup-sni.c
+++ b/arch/mips/pci/fixup-sni.c
@@ -32,7 +32,7 @@
* Device 4: Unused
* Device 5: Slot 2
* Device 6: Slot 3
- * Device 7: Slot 4
+ * Device 7: Slot 4
*
* Documentation says the VGA is device 5 and device 3 is unused but that
* seem to be a documentation error. At least on my RM200C the Cirrus
diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c
index 850a900f0eb..bc55b06e190 100644
--- a/arch/mips/pci/fixup-tb0219.c
+++ b/arch/mips/pci/fixup-tb0219.c
@@ -29,27 +29,12 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
switch (slot) {
case 12:
- vr41xx_set_irq_trigger(TB0219_PCI_SLOT1_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
- vr41xx_set_irq_level(TB0219_PCI_SLOT1_PIN,
- LEVEL_LOW);
irq = TB0219_PCI_SLOT1_IRQ;
break;
case 13:
- vr41xx_set_irq_trigger(TB0219_PCI_SLOT2_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
- vr41xx_set_irq_level(TB0219_PCI_SLOT2_PIN,
- LEVEL_LOW);
irq = TB0219_PCI_SLOT2_IRQ;
break;
case 14:
- vr41xx_set_irq_trigger(TB0219_PCI_SLOT3_PIN,
- TRIGGER_LEVEL,
- SIGNAL_THROUGH);
- vr41xx_set_irq_level(TB0219_PCI_SLOT3_PIN,
- LEVEL_LOW);
irq = TB0219_PCI_SLOT3_IRQ;
break;
default:
diff --git a/arch/mips/pci/ops-ddb5477.c b/arch/mips/pci/ops-ddb5477.c
index e955443fedf..0406b50a37d 100644
--- a/arch/mips/pci/ops-ddb5477.c
+++ b/arch/mips/pci/ops-ddb5477.c
@@ -127,7 +127,7 @@ static inline void ddb_close_config_base(struct pci_config_swap *swap)
}
static int read_config_dword(struct pci_config_swap *swap,
- struct pci_bus *bus, u32 devfn, u32 where,
+ struct pci_bus *bus, u32 devfn, u32 where,
u32 * val)
{
u32 bus_num, slot_num, func_num;
@@ -153,7 +153,7 @@ static int read_config_dword(struct pci_config_swap *swap,
}
static int read_config_word(struct pci_config_swap *swap,
- struct pci_bus *bus, u32 devfn, u32 where,
+ struct pci_bus *bus, u32 devfn, u32 where,
u16 * val)
{
int status;
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index 2a9d7227fe8..7688b771132 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -1,16 +1,16 @@
/*
* Copyright 2001 MontaVista Software Inc.
* Author: MontaVista Software, Inc.
- * ahennessy@mvista.com
+ * ahennessy@mvista.com
*
- * Copyright (C) 2000-2001 Toshiba Corporation
+ * Copyright (C) 2000-2001 Toshiba Corporation
* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
*
* Based on arch/mips/ddb5xxx/ddb5477/pci_ops.c
*
* Define the pci_ops for the Toshiba rbtx4927
*
- * Much of the code is derived from the original DDB5074 port by
+ * Much of the code is derived from the original DDB5074 port by
* Geert Uytterhoeven <geert@sonycom.com>
*
* Copyright 2004 MontaVista Software Inc.
diff --git a/arch/mips/pci/pci-ddb5477.c b/arch/mips/pci/pci-ddb5477.c
index 4ddd53eaf65..826d653184e 100644
--- a/arch/mips/pci/pci-ddb5477.c
+++ b/arch/mips/pci/pci-ddb5477.c
@@ -76,7 +76,7 @@ struct pci_controller ddb5477_io_controller = {
*/
/*
- * irq mapping : device -> pci int # -> vrc4377 irq# ,
+ * irq mapping : device -> pci int # -> vrc4377 irq# ,
* ddb5477 board manual page 4 and vrc5477 manual page 46
*/
@@ -137,9 +137,9 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
unsigned char *slot_irq_map;
unsigned char irq;
- /*
+ /*
* We ignore the swizzled slot and pin values. The original
- * pci_fixup_irq() codes largely base irq number on the dev slot
+ * pci_fixup_irq() codes largely base irq number on the dev slot
* numbers because except for one case they are unique even
* though there are multiple pci buses.
*/
@@ -160,7 +160,7 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
if (mips_machtype == MACH_NEC_ROCKHOPPERII) {
/* hack to distinquish overlapping slot 20s, one
- * on bus 0 (ALI USB on the M1535 on the backplane),
+ * on bus 0 (ALI USB on the M1535 on the backplane),
* and one on bus 2 (NEC USB controller on the CPU board)
* Make the M1535 USB - ISA IRQ number 9.
*/
diff --git a/arch/mips/pci/pci-ip32.c b/arch/mips/pci/pci-ip32.c
index 1faeb034f06..000dc6af6cd 100644
--- a/arch/mips/pci/pci-ip32.c
+++ b/arch/mips/pci/pci-ip32.c
@@ -84,7 +84,7 @@ static irqreturn_t macepci_error(int irq, void *dev, struct pt_regs *regs)
extern struct pci_ops mace_pci_ops;
-#ifdef CONFIG_MIPS64
+#ifdef CONFIG_64BIT
static struct resource mace_pci_mem_resource = {
.name = "SGI O2 PCI MEM",
.start = MACEPCI_HI_MEMORY,
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 8141dffac24..a8d499b0a36 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -132,7 +132,7 @@ static int __init pcibios_init(void)
hose->need_domain_info = need_domain_info;
next_busno = bus->subordinate + 1;
/* Don't allow 8-bit bus number overflow inside the hose -
- reserve some space for bridges. */
+ reserve some space for bridges. */
if (next_busno > 224) {
next_busno = 0;
need_domain_info = 1;
@@ -260,7 +260,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
(dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
pci_read_bridge_bases(bus);
pcibios_fixup_device_resources(dev, bus);
- }
+ }
for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
struct pci_dev *dev = pci_dev_b(ln);
@@ -292,8 +292,25 @@ pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
region->end = res->end - offset;
}
+void __devinit
+pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+ struct pci_bus_region *region)
+{
+ struct pci_controller *hose = (struct pci_controller *)dev->sysdata;
+ unsigned long offset = 0;
+
+ if (res->flags & IORESOURCE_IO)
+ offset = hose->io_offset;
+ else if (res->flags & IORESOURCE_MEM)
+ offset = hose->mem_offset;
+
+ res->start = region->start + offset;
+ res->end = region->end + offset;
+}
+
#ifdef CONFIG_HOTPLUG
EXPORT_SYMBOL(pcibios_resource_to_bus);
+EXPORT_SYMBOL(pcibios_bus_to_resource);
EXPORT_SYMBOL(PCIBIOS_MIN_IO);
EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
#endif
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-11-05 14:36:07 +0000