diff options
Diffstat (limited to 'arch/sh/include/cpu-common')
-rw-r--r-- | arch/sh/include/cpu-common/cpu/addrspace.h | 19 | ||||
-rw-r--r-- | arch/sh/include/cpu-common/cpu/cacheflush.h | 44 | ||||
-rw-r--r-- | arch/sh/include/cpu-common/cpu/mmu_context.h | 16 | ||||
-rw-r--r-- | arch/sh/include/cpu-common/cpu/rtc.h | 8 | ||||
-rw-r--r-- | arch/sh/include/cpu-common/cpu/sigcontext.h | 17 | ||||
-rw-r--r-- | arch/sh/include/cpu-common/cpu/timer.h | 6 |
6 files changed, 110 insertions, 0 deletions
diff --git a/arch/sh/include/cpu-common/cpu/addrspace.h b/arch/sh/include/cpu-common/cpu/addrspace.h new file mode 100644 index 00000000000..2b9ab93efa4 --- /dev/null +++ b/arch/sh/include/cpu-common/cpu/addrspace.h @@ -0,0 +1,19 @@ +/* + * Definitions for the address spaces of the SH-2 CPUs. + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_ADDRSPACE_H +#define __ASM_CPU_SH2_ADDRSPACE_H + +#define P0SEG 0x00000000 +#define P1SEG 0x80000000 +#define P2SEG 0xa0000000 +#define P3SEG 0xc0000000 +#define P4SEG 0xe0000000 + +#endif /* __ASM_CPU_SH2_ADDRSPACE_H */ diff --git a/arch/sh/include/cpu-common/cpu/cacheflush.h b/arch/sh/include/cpu-common/cpu/cacheflush.h new file mode 100644 index 00000000000..c3db00b7360 --- /dev/null +++ b/arch/sh/include/cpu-common/cpu/cacheflush.h @@ -0,0 +1,44 @@ +/* + * include/asm-sh/cpu-sh2/cacheflush.h + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_CACHEFLUSH_H +#define __ASM_CPU_SH2_CACHEFLUSH_H + +/* + * Cache flushing: + * + * - flush_cache_all() flushes entire cache + * - flush_cache_mm(mm) flushes the specified mm context's cache lines + * - flush_cache_dup mm(mm) handles cache flushing when forking + * - flush_cache_page(mm, vmaddr, pfn) flushes a single page + * - flush_cache_range(vma, start, end) flushes a range of pages + * + * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache + * - flush_icache_range(start, end) flushes(invalidates) a range for icache + * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache + * + * Caches are indexed (effectively) by physical address on SH-2, so + * we don't need them. + */ +#define flush_cache_all() do { } while (0) +#define flush_cache_mm(mm) do { } while (0) +#define flush_cache_dup_mm(mm) do { } while (0) +#define flush_cache_range(vma, start, end) do { } while (0) +#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) +#define flush_dcache_page(page) do { } while (0) +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) +#define flush_icache_range(start, end) do { } while (0) +#define flush_icache_page(vma,pg) do { } while (0) +#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) +#define flush_cache_sigtramp(vaddr) do { } while (0) + +#define p3_cache_init() do { } while (0) + +#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ diff --git a/arch/sh/include/cpu-common/cpu/mmu_context.h b/arch/sh/include/cpu-common/cpu/mmu_context.h new file mode 100644 index 00000000000..beeb299e01e --- /dev/null +++ b/arch/sh/include/cpu-common/cpu/mmu_context.h @@ -0,0 +1,16 @@ +/* + * include/asm-sh/cpu-sh2/mmu_context.h + * + * Copyright (C) 2003 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#ifndef __ASM_CPU_SH2_MMU_CONTEXT_H +#define __ASM_CPU_SH2_MMU_CONTEXT_H + +/* No MMU */ + +#endif /* __ASM_CPU_SH2_MMU_CONTEXT_H */ + diff --git a/arch/sh/include/cpu-common/cpu/rtc.h b/arch/sh/include/cpu-common/cpu/rtc.h new file mode 100644 index 00000000000..39e2d6e9478 --- /dev/null +++ b/arch/sh/include/cpu-common/cpu/rtc.h @@ -0,0 +1,8 @@ +#ifndef __ASM_SH_CPU_SH2_RTC_H +#define __ASM_SH_CPU_SH2_RTC_H + +#define rtc_reg_size sizeof(u16) +#define RTC_BIT_INVERTED 0 +#define RTC_DEF_CAPABILITIES 0UL + +#endif /* __ASM_SH_CPU_SH2_RTC_H */ diff --git a/arch/sh/include/cpu-common/cpu/sigcontext.h b/arch/sh/include/cpu-common/cpu/sigcontext.h new file mode 100644 index 00000000000..fe5c15dd6e8 --- /dev/null +++ b/arch/sh/include/cpu-common/cpu/sigcontext.h @@ -0,0 +1,17 @@ +#ifndef __ASM_CPU_SH2_SIGCONTEXT_H +#define __ASM_CPU_SH2_SIGCONTEXT_H + +struct sigcontext { + unsigned long oldmask; + + /* CPU registers */ + unsigned long sc_regs[16]; + unsigned long sc_pc; + unsigned long sc_pr; + unsigned long sc_sr; + unsigned long sc_gbr; + unsigned long sc_mach; + unsigned long sc_macl; +}; + +#endif /* __ASM_CPU_SH2_SIGCONTEXT_H */ diff --git a/arch/sh/include/cpu-common/cpu/timer.h b/arch/sh/include/cpu-common/cpu/timer.h new file mode 100644 index 00000000000..a39c241e819 --- /dev/null +++ b/arch/sh/include/cpu-common/cpu/timer.h @@ -0,0 +1,6 @@ +#ifndef __ASM_CPU_SH2_TIMER_H +#define __ASM_CPU_SH2_TIMER_H + +/* Nothing needed yet */ + +#endif /* __ASM_CPU_SH2_TIMER_H */ |