diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-parisc/cache.h | 8 | ||||
| -rw-r--r-- | include/asm-parisc/io.h | 2 | ||||
| -rw-r--r-- | include/asm-parisc/page.h | 7 | ||||
| -rw-r--r-- | include/asm-parisc/pci.h | 8 | ||||
| -rw-r--r-- | include/asm-parisc/processor.h | 18 | ||||
| -rw-r--r-- | include/asm-parisc/tlbflush.h | 1 | ||||
| -rw-r--r-- | include/linux/cache.h | 2 |
7 files changed, 30 insertions, 16 deletions
diff --git a/include/asm-parisc/cache.h b/include/asm-parisc/cache.h index 38d201b5652..93f179f13ce 100644 --- a/include/asm-parisc/cache.h +++ b/include/asm-parisc/cache.h @@ -29,14 +29,14 @@ #define SMP_CACHE_BYTES L1_CACHE_BYTES -extern void flush_data_cache_local(void); /* flushes local data-cache only */ -extern void flush_instruction_cache_local(void); /* flushes local code-cache only */ +extern void flush_data_cache_local(void *); /* flushes local data-cache only */ +extern void flush_instruction_cache_local(void *); /* flushes local code-cache only */ #ifdef CONFIG_SMP extern void flush_data_cache(void); /* flushes data-cache only (all processors) */ extern void flush_instruction_cache(void); /* flushes i-cache only (all processors) */ #else -#define flush_data_cache flush_data_cache_local -#define flush_instruction_cache flush_instruction_cache_local +#define flush_data_cache() flush_data_cache_local(NULL) +#define flush_instruction_cache() flush_instruction_cache_local(NULL) #endif extern void parisc_cache_init(void); /* initializes cache-flushing */ diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h index b9bb5946ecc..0db00adc942 100644 --- a/include/asm-parisc/io.h +++ b/include/asm-parisc/io.h @@ -41,7 +41,7 @@ extern void __raw_bad_addr(const volatile void __iomem *addr); #define __raw_check_addr(addr) \ if (((unsigned long)addr >> NYBBLE_SHIFT) != 0xe) \ __raw_bad_addr(addr); \ - addr = (void *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT)); + addr = (void __iomem *)((unsigned long)addr | (0xfUL << NYBBLE_SHIFT)); #else #define gsc_check_addr(addr) #define __raw_check_addr(addr) diff --git a/include/asm-parisc/page.h b/include/asm-parisc/page.h index 44eae9f8274..4a6752b0afe 100644 --- a/include/asm-parisc/page.h +++ b/include/asm-parisc/page.h @@ -135,6 +135,13 @@ extern int npmem_ranges; #define pfn_valid(pfn) ((pfn) < max_mapnr) #endif /* CONFIG_DISCONTIGMEM */ +#ifdef CONFIG_HUGETLB_PAGE +#define HPAGE_SHIFT 22 /* 4MB (is this fixed?) */ +#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) +#define HPAGE_MASK (~(HPAGE_SIZE - 1)) +#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) +#endif + #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index fa39d07d49e..f277254159b 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h @@ -84,11 +84,17 @@ static __inline__ int pci_is_lmmio(struct pci_hba_data *hba, unsigned long a) /* ** Convert between PCI (IO_VIEW) addresses and processor (PA_VIEW) addresses. ** See pcibios.c for more conversions used by Generic PCI code. +** +** Platform characteristics/firmware guarantee that +** (1) PA_VIEW - IO_VIEW = lmmio_offset for both LMMIO and ELMMIO +** (2) PA_VIEW == IO_VIEW for GMMIO */ #define PCI_BUS_ADDR(hba,a) (PCI_IS_LMMIO(hba,a) \ ? ((a) - hba->lmmio_space_offset) /* mangle LMMIO */ \ : (a)) /* GMMIO */ -#define PCI_HOST_ADDR(hba,a) ((a) + hba->lmmio_space_offset) +#define PCI_HOST_ADDR(hba,a) (((a) & PCI_F_EXTEND) == 0 \ + ? (a) + hba->lmmio_space_offset \ + : (a)) #else /* !CONFIG_64BIT */ diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h index aae40e8c3aa..89f2f1c16c1 100644 --- a/include/asm-parisc/processor.h +++ b/include/asm-parisc/processor.h @@ -144,16 +144,16 @@ struct thread_struct { }) #define INIT_THREAD { \ - regs: { gr: { 0, }, \ - fr: { 0, }, \ - sr: { 0, }, \ - iasq: { 0, }, \ - iaoq: { 0, }, \ - cr27: 0, \ + .regs = { .gr = { 0, }, \ + .fr = { 0, }, \ + .sr = { 0, }, \ + .iasq = { 0, }, \ + .iaoq = { 0, }, \ + .cr27 = 0, \ }, \ - task_size: DEFAULT_TASK_SIZE, \ - map_base: DEFAULT_MAP_BASE, \ - flags: 0 \ + .task_size = DEFAULT_TASK_SIZE, \ + .map_base = DEFAULT_MAP_BASE, \ + .flags = 0 \ } /* diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h index c9ec39c6fc6..825994a90e2 100644 --- a/include/asm-parisc/tlbflush.h +++ b/include/asm-parisc/tlbflush.h @@ -22,6 +22,7 @@ extern spinlock_t pa_tlb_lock; #define purge_tlb_end(x) spin_unlock(&pa_tlb_lock) extern void flush_tlb_all(void); +extern void flush_tlb_all_local(void *); /* * flush_tlb_mm() diff --git a/include/linux/cache.h b/include/linux/cache.h index ffe52210fc4..d22e632f41f 100644 --- a/include/linux/cache.h +++ b/include/linux/cache.h @@ -13,7 +13,7 @@ #define SMP_CACHE_BYTES L1_CACHE_BYTES #endif -#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64) +#if defined(CONFIG_X86) || defined(CONFIG_SPARC64) || defined(CONFIG_IA64) || defined(CONFIG_PARISC) #define __read_mostly __attribute__((__section__(".data.read_mostly"))) #else #define __read_mostly |