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path: root/arch/arm/mach-tegra/sleep.S
AgeCommit message (Expand)Author
2013-08-12ARM: tegra: add LP1 suspend support for Tegra30Joseph Lo
2013-07-19ARM: tegra: set up the correct L2 data RAM latency for Cortex-A15Joseph Lo
2013-07-19ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALLJoseph Lo
2013-05-22ARM: tegra: skip SCU and PL310 code when CPU is not Cortex-A9Joseph Lo
2013-01-28ARM: tegra20: cpuidle: apply coupled cpuidle for powered-down modeJoseph Lo
2013-01-28ARM: tegra: update the cache maintenance order for CPU shutdownJoseph Lo
2012-11-15ARM: tegra: retain L2 content over CPU suspend/resumeJoseph Lo
2012-11-15ARM: tegra30: cpuidle: add powered-down state for CPU0Joseph Lo
2012-11-15ARM: tegra30: cpuidle: add powered-down state for secondary CPUsJoseph Lo
2012-11-05ARM: tegra: move iomap.h to mach-tegraStephen Warren
2012-09-13ARM: tegra: clean up the common assembly macros into sleep.hJoseph Lo
2012-06-11ARM: tegra: Remove flow controller programmingPrashant Gaikwad
2012-03-26ARM: tegra: Include assembler.h in sleep.S to fix build breakStephen Warren
2012-02-06ARM: tegra: assembler code for LP3Peter De Schrijver
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