Age | Commit message (Expand) | Author |
---|---|---|
2014-11-19 | MIPS: Loongson: Set Loongson-3's ISA level to MIPS64R1 | Huacai Chen |
2014-09-22 | MIPS: Use WSBH/DSBH/DSHD on Loongson 3A | Chen Jie |
2013-05-08 | MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem | Huacai Chen |
2013-02-01 | MIPS: Whitespace cleanup. | Ralf Baechle |
2012-10-11 | MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required. | Ralf Baechle |
2010-05-21 | MIPS: Loongson: update cpu-feature-overrides.h | Wu Zhangjin |
2010-02-27 | MIPS: Loongson: Change the Email address of Wu Zhangjin | Wu Zhangjin |
2009-11-02 | MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store | Zhang Le |
2009-09-17 | MIPS: Loongson: Change naming methods | Wu Zhangjin |