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path: root/arch/mips/mm/tlb-r4k.c
AgeCommit message (Expand)Author
2009-01-11MIPS: Only write c0_framemask on CPUs which have this register.Ralf Baechle
2008-04-28[MIPS] All MIPS32 processors support64-bit physical addresses.Chris Dearman
2008-03-12[MIPS] Fix loads of section missmatchesRalf Baechle
2008-03-12[MIPS] Fix typo in commentThiemo Seufer
2007-10-11[MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle
2007-07-10[MIPS] define Hit_Invalidate_I to Index_Invalidate_I for loongson2Fuxin Zhang
2007-01-19[MIPS] Delete duplicate call to load_irq_save.Ralf Baechle
2006-09-27[MIPS] Replace BARRIER with more appropriate hazard barrier.Ralf Baechle
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel
2006-06-19[MIPS] Remove prototype for non-existing function.Ralf Baechle
2006-04-19[MIPS] MT: Improved multithreading support.Ralf Baechle
2006-03-21[MIPS] Kill tlb-andes.c.Thiemo Seufer
2005-10-29Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle
2005-10-29Fix race conditions for read_c0_entryhi. Remove broken ASID masks inThiemo Seufer
2005-10-29Update MIPS to use the 4-level pagetable code thereby getting rid ofRalf Baechle
2005-10-29Formatting fixes.Maciej W. Rozycki
2005-04-16Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds
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