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A platform_driver does not need to set an owner, it will be populated by the
driver core.
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Signed-off-by: abdoulaye berthe <berthe.ab@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This patch fixes kernel NULL pointer BUG introduced by the following commit:
b667cf488aa9476b0ab64acd91f2a96f188cfd21
gpio: ich: Add support for multiple register addresses.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Tested-by: Eric Paris <eparis@redhat.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This patch adds support for Atom C2000 series (Avoton and Rangeley). And has
the following options:
- New addresses register.
- Caching output levels (see Intel external design spec, table 48-29)
- No hardware blink.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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This patch allows GPIO driver to cache GPIO_LVL output registers. The aim is to
support chipsets on which GPIO_LVL value can't be read for output pins.
Caching output levels implies the first output values reading as 0. The driver
so can't be aware of set values GPIOs by bootloader or BIOS.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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This patch introduces regs and reglen pointers which allow a chipset to have
register addresses differing from ICH ones.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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This patch allows gpio_ich driver to be aware of non blink capable chipsets.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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This switches the two members of struct gpio_chip that were
defined as unsigned foo:1 to bool, because that is indeed what
they are. Switch all users in the gpio and pinctrl subsystems
to assign these values with true/false instead of 0/1. The
users outside these subsystems will survive since true/false
is 1/0, atleast we set some kind of more strict typing example.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Use the wrapper function for retrieving the platform data instead of
accessing dev->platform_data directly.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This patch makes sure blink hardware is disabled for selected GPIO. Blink
hardware is controled by GPO_BLINK register and is available for GPIOs from 0
to 31.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Pull GPIO changes from Grant Likely:
"The usual selection of bug fixes and driver updates for GPIO. Nothing
really stands out except the addition of the GRGPIO driver and some
enhacements to ACPI support"
I'm pulling this despite the earlier mess. Let's hope it compiles these
days.
* tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: (46 commits)
gpio: grgpio: Add irq support
gpio: grgpio: Add device driver for GRGPIO cores
gpiolib-acpi: introduce acpi_get_gpio_by_index() helper
GPIO: gpio-generic: remove kfree() from bgpio_remove call
gpio / ACPI: Handle ACPI events in accordance with the spec
gpio: lpc32xx: Fix off-by-one valid range checking for bank
gpio: mcp23s08: convert driver to DT
gpio/omap: force restore if context loss is not detectable
gpio/omap: optimise interrupt service routine
gpio/omap: remove extra context restores in *_runtime_resume()
gpio/omap: free irq domain in probe() failure paths
gpio: gpio-generic: Add 16 and 32 bit big endian byte order support
gpio: samsung: Add terminating entry for exynos_pinctrl_ids
gpio: mvebu: add dbg_show function
MAX7301 GPIO: Do not force SPI speed when using OF Platform
gpio: gpio-tps65910.c: fix checkpatch error
gpio: gpio-timberdale.c: fix checkpatch error
gpio: gpio-tc3589x.c: fix checkpatch errors
gpio: gpio-stp-xway.c: fix checkpatch error
gpio: gpio-sch.c: fix checkpatch error
...
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It is more readable for humans to use double-bang (!!) to convert the value
to pure boolean before it is returned.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stop checking for pin availability in direction and get functions.
These functions can be called repeatedly, so checking every time is
bad for performance. Now that requesting GPIO pins is no longer
optional, checking for availability at pin request time is enough.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Per Documentation/gpio.txt, gpio_request callbacks should return 0 on
success or a negative value on error. So it is not clear what was
meant by letting ichx_gpio_request return 1 in some cases, nor how a
caller would interpret it.
Align the code with the comment above it and consider pins as
available by default.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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ichx_gpio_check_available() returns either 0 or -ENXIO depending on whether
the given GPIO is available or not. However, callers of this function treat
the return value as boolean:
...
if (!ichx_gpio_check_available(gpio, nr))
return -ENXIO;
which erroneusly fails when the GPIO is available and not vice versa.
Fix this by making the function return boolean as expected by the callers.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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As reported by CONFIG_DEBUG_SPINLOCK=y.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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CONFIG_HOTPLUG is going away as an option so __devexit is no
longer needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.
Signed-off-by: Bill Pemberton <wfp5p@virginia.edu>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The ICH chips have their GPIO pins organized in 2 or 3 independent
groups of 32 GPIO pins. It can happen that the ACPI BIOS wants to make
use of pins in one group, preventing the OS to access these. This does
not prevent the OS from accessing the other group(s).
This is the case for example on my Asus Z8NA-D6 board. The ACPI BIOS
wants to control GPIO 18 (group 1), while I (the OS) need to control
GPIO 52 and 53 (group 2) for SMBus multiplexing.
So instead of checking for ACPI resource conflict on the whole I/O
range, check on a per-group basis, and consider it a success if at
least one of the groups is available for the OS to use.
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Aaron Sierra <asierra@xes-inc.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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This driver works on many Intel chipsets, including the ICH6, ICH7,
ICH8, ICH9, ICH10, 3100, Series 5/3400 (Ibex Peak), Series 6/C200
(Cougar Point), and NM10 (Tiger Point).
Additional Intel chipsets should be easily supported if needed, eg the
ICH1-5, EP80579, etc.
Tested on QM67 (Cougar Point), QM57 (Ibex Peak), 3100 (Whitmore Lake),
and NM10 (Tiger Point).
Includes work from Jean Delvare:
- Resource leak removal during module load/unload
- GPIO API bit value enforcement
Also includes code cleanup from Guenter Roeck and Grant Likely.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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