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Author
2014-01-29
Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linux
Linus Torvalds
2014-01-30
Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/...
Dave Airlie
2014-01-30
drm/nouveau: resume display if any later suspend bits fail
Ilia Mirkin
2014-01-30
drm/nouveau: fix lock unbalance in nouveau_crtc_page_flip
Maarten Lankhorst
2014-01-30
drm/nouveau: implement hooks for needed for drm vblank timestamping support
Ben Skeggs
2014-01-30
drm/nouveau/disp: add a method to fetch info needed by drm vblank timestamping
Ben Skeggs
2014-01-30
drm/nv50: fill in crtc mode struct members from crtc_mode_fixup
Ben Skeggs
2014-01-29
Merge branch 'drm-armada-fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-cubo...
Dave Airlie
2014-01-24
Merge tag 'pm+acpi-3.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Linus Torvalds
2014-01-23
drm/nouveau: call drm_vblank_cleanup() earlier
Ben Skeggs
2014-01-23
drm/nouveau: create base display from common code
Ben Skeggs
2014-01-23
drm/nv50/gr: print mpc trap name when it's not an mp trap
Ilia Mirkin
2014-01-23
drm/nv50/gr: update list of mp errors, make it a bitfield
Ilia Mirkin
2014-01-23
drm/nv50/gr: add more trap names to print on error
Ilia Mirkin
2014-01-23
drm/nouveau/devinit: lock/unlock crtc regs for all devices, not just pre-nv50
Ilia Mirkin
2014-01-23
drm/nouveau: hold mutex while syncing to kernel channel
Maarten Lankhorst
2014-01-23
drm/nv50-/devinit: prevent use of engines marked as disabled by hw/vbios
Ilia Mirkin
2014-01-23
drm/nouveau/device: provide a way for devinit to mark engines as disabled
Ilia Mirkin
2014-01-23
drm/nouveau/devinit: tidy up the subdev class definition
Ben Skeggs
2014-01-23
drm/nouveau/bar: tidy up the subdev and object class definitions
Ben Skeggs
2014-01-23
drm/nouveau/instmem: tidy up the object class definition
Ben Skeggs
2014-01-23
drm/nouveau/instmem: tidy up the subdev class definition
Ben Skeggs
2014-01-23
drm/nouveau/pwr: implement a simple i2c stack
Ben Skeggs
2014-01-23
drm/nouveau/pwr: have rd/wr32 routines clobber data instead of addr
Ben Skeggs
2014-01-23
drm/nve0/fb: turn off some bits in 10f584 at init
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: merge a fix from ddr3 for one of the timing settings
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: yet another random 10f200 bit
Ben Skeggs
2014-01-23
drm/nvc0-/fb: hook up skeleton interrupt handler
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: more 10f200 stuff
Ben Skeggs
2014-01-23
drm/nve0/clk: report ddr memory frequency
Ben Skeggs
2014-01-23
drm/nouveau/fb/gddr5: make sure we update mr7 when we're supposed to
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: 10f698/69c
Ben Skeggs
2014-01-23
drm/nve0/fb: it's now safe to obey the memory voltage setting properly
Ben Skeggs
2014-01-23
drm/nve0/fb: multi-stage reclock is required for certain transitions
Ben Skeggs
2014-01-23
drm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclock
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: parse bios data into struct rather than using directly
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: found LP3 setting
Ben Skeggs
2014-01-23
drm/nve0/fb: note the memory voltage toggle, not using it yet
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: somewhat better attempt at 100770/10f604/610/614
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: fixup delays a bit
Ben Skeggs
2014-01-23
drm/nouveau/bios: timing 2.0 entries can have subentries
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: note another semi-unknown
Ben Skeggs
2014-01-23
drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: fix calculation of RDQS setting
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: switch off some other random bit at some point
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: punt all 10f910/914 accesses through ram_train
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: not all memory partitions are created equal
Ben Skeggs
2014-01-23
drm/nve0/fb: typo in register name
Ben Skeggs
2014-01-23
drm/nouveau/bios: make common code to handle ramcfg strap etc
Ben Skeggs
2014-01-23
drm/nve0/fb/gddr5: fix an assumption of sane memory controller layout
Ben Skeggs
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