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path: root/drivers/gpu/drm/tegra/gem.c
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2015-01-27drm/tegra: gem: oops in error handlingDan Carpenter
kfree(ERR_PTR(-ENOMEM)) will not work very well. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-27drm/tegra: gem: Use iommu_map_sg()Thierry Reding
The iommu_map_sg() function is now available in the IOMMU API, so drop the open-coded variant. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17drm/tegra: gem: Use the proper size for GEM objectsThierry Reding
If the requested buffer size wasn't a multiple of the page size, the IOMMU code would round down the size to the next multiple of the page size, thereby causing translation errors. To fix this we no longer pass around the requested size but reuse the computed size of the GEM object. This is already rounded to the next page boundary, so mapping that size works out fine. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-12-17drm/tegra: gem: Flush buffer objects upon allocationThierry Reding
Buffers obtained via shmem may still have associated cachelines. If they aren't properly flushed they may cause framebuffer corruption if the cache gets flushed after the application has drawn to it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Check before freeing CMA memoryThierry Reding
dma_free_writecombine() must not be called on a buffer that couldn't be allocated. Check for a valid virtual address before attempting to free the memory to avoid a crash. Reported-by: Sean Paul <seanpaul@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Use more consistent data typesThierry Reding
Use size_t consistently for sizes and u32/u64 instead of uint32_t and uint64_t. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: dumb: pitch and size are outputsThierry Reding
When creating a dumb buffer object using the DRM_IOCTL_MODE_CREATE_DUMB IOCTL, only the width, height, bpp and flags parameters are inputs. The caller is not guaranteed to zero out or set handle, pitch and size, so the driver must not treat these values as possible inputs. Fixes a bug where running the Weston compositor on Tegra DRM would cause an attempt to allocate a 3 GiB framebuffer to be allocated. Fixes: de2ba664c30f ("gpu: host1x: drm: Add memory manager and fb") Cc: stable@vger.kernel.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: Add IOMMU supportThierry Reding
When an IOMMU device is available on the platform bus, allocate an IOMMU domain and attach the display controllers to it. The display controllers can then scan out non-contiguous buffers by mapping them through the IOMMU. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Use dma_mmap_writecombine()Thierry Reding
Use the existing API rather than open-coding equivalent functionality in the driver. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Remove redundant drm_gem_free_mmap_offset()Thierry Reding
The drm_gem_object_release() function already performs this cleanup, so there is no reason to do it explicitly. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Cleanup tegra_bo_create_with_handle()Thierry Reding
There is only a single location where the function needs to do cleanup. Skip the error unwinding path and call the cleanup function directly instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-13drm/tegra: gem: Extract tegra_bo_alloc_object()Thierry Reding
This function implements the common buffer object allocation used for both allocation and import paths. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-07Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
Pull DRM updates from Dave Airlie: "Like all good pull reqs this ends with a revert, so it must mean we tested it, [ Ed. That's _one_ way of looking at it ] This pull is missing nouveau, Ben has been stuck trying to track down a very longstanding bug that revealed itself due to some other changes. I've asked him to send you a direct pull request for nouveau once he cleans things up. I'm away until Monday so don't want to delay things, you can make a decision on that when he sends it, I have my phone so I can ack things just not really merge much. It has one trivial conflict with your tree in armada_drv.c, and also the pull request contains some component changes that are already in your tree, the base tree from Russell went via Greg's tree already, but some stuff still shows up in here that doesn't when I merge my tree into yours. Otherwise all pretty standard graphics fare, one new driver and changes all over the place. New drivers: - sti kms driver for STMicroelectronics chipsets stih416 and stih407. core: - lots of cleanups to the drm core - DP MST helper code merged - universal cursor planes. - render nodes enabled by default panel: - better panel interfaces - new panel support - non-continuous cock advertising ability ttm: - shrinker fixes i915: - hopefully ditched UMS support - runtime pm fixes - psr tracking and locking - now enabled by default - userptr fixes - backlight brightness fixes - MST support merged - runtime PM for dpms - primary planes locking fixes - gen8 hw semaphore support - fbc fixes - runtime PM on SOix sleep state hw. - mmio base page flipping - lots of vlv/chv fixes. - universal cursor planes radeon: - Hawaii fixes - display scalar support for non-fixed mode displays - new firmware format support - dpm on more asics by default - GPUVM improvements - uncached and wc GTT buffers - BOs > visible VRAM exynos: - i80 interface support - module auto-loading - ipp driver consolidated. armada: - irq handling in crtc layer only - crtc renumbering - add component support - DT interaction changes. tegra: - load as module fixes - eDP bpp and sync polarity fixed - DSI non-continuous clock mode support - better support for importing buffers from nouveau msm: - mdp5/adq8084 v1.3 hw enablement - devicetree clk changse - ifc6410 board working tda998x: - component support - DT documentation update vmwgfx: - fix compat shader namespace" * 'drm-next' of git://people.freedesktop.org/~airlied/linux: (551 commits) Revert "drm: drop redundant drm_file->is_master" drm/panel: simple: Use devm_gpiod_get_optional() drm/dsi: Replace upcasting macro by function drm/panel: ld9040: Replace upcasting macro by function drm/exynos: dp: Modify driver to support drm_panel drm/exynos: Move DP setup into commit() drm/panel: simple: Add AUO B133HTN01 panel support drm/panel: simple: Support delays in panel functions drm/panel: simple: Add proper definition for prepare and unprepare drm/panel: s6e8aa0: Add proper definition for prepare and unprepare drm/panel: ld9040: Add proper definition for prepare and unprepare drm/tegra: Add support for panel prepare and unprepare routines drm/exynos: dsi: Add support for panel prepare and unprepare routines drm/exynos: dpi: Add support for panel prepare and unprepare routines drm/panel: simple: Add dummy prepare and unprepare routines drm/panel: s6e8aa0: Add dummy prepare and unprepare routines drm/panel: ld9040: Add dummy prepare and unprepare routines drm/panel: Provide convenience wrapper for .get_modes() drm/panel: add .prepare() and .unprepare() functions drm/panel: simple: Remove simple-panel compatible ...
2014-08-04drm/tegra: Properly align stride for framebuffersThierry Reding
Tegra20 and Tegra30 both required the buffer line stride to be aligned on 8 byte boundaries. Tegra114 and Tegra124 increased the alignment to 64 bytes. Introduce a parameter to specify the alignment requirements for each display controller and round up the pitch of newly allocated framebuffers appropriately. Originally-by: Stéphane Marchesin <marcheu@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-08-04drm/tegra: Implement more tiling modesThierry Reding
Tegra124 supports a block-linear mode in addition to the regular pitch linear and tiled modes. Add support for these by moving the internal representation into a structure rather than a simple flag. Tested-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-07-08dma-buf: use reservation objectsMaarten Lankhorst
This allows reservation objects to be used in dma-buf. it's required for implementing polling support on the fences that belong to a dma-buf. Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com> #drivers/media/v4l2-core/ Acked-by: Thomas Hellstrom <thellstrom@vmware.com> #drivers/gpu/drm/ttm Acked-by: Sumit Semwal <sumit.semwal@linaro.org> Acked-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Vincent Stehlé <vincent.stehle@laposte.net> #drivers/gpu/drm/armada/ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-06-05drm/tegra: gem - Make tegra_bo_import() staticThierry Reding
The function is never used outside of the source file and therefore can be locally scoped. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/tegra: Relicense under GPL v2Thierry Reding
The majority of the code in this driver is licensed under the GPL v2, so relicense the rest under GPL v2 as well for consistency. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-04-04drm/tegra: prime: Add vmap supportThierry Reding
This is trivial to support since all GEM objects are mapped into kernel space anyway. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-20drm/tegra: Add PRIME supportThierry Reding
Implement very basic PRIME support. This currently only works with buffers that are contiguous in memory and will refuse to import any physically non-contiguous buffers. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19drm/tegra: Do not export tegra_bo_opsThierry Reding
These buffer object operations are never used outside of the GEM implementation so there is no use in exporting them. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-12-19drm/tegra: Remove spurious blank lineThierry Reding
Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Support bottom-up buffer objectsThierry Reding
The gr3d engine renders images bottom-up. Allow buffers that are used for 3D content to be marked as such and implement support in the display controller to present them properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Add support for tiled buffer objectsThierry Reding
The gr2d and gr3d engines work more efficiently on buffers with a tiled memory layout. Allow created buffers to be marked as tiled so that the display controller can scan them out properly. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-10-31drm/tegra: Move driver to DRM treeThierry Reding
In order to make subsystem-wide changes easier, move the Tegra DRM driver back into the DRM tree. Signed-off-by: Thierry Reding <treding@nvidia.com>