Contraintes de registres sur div et mod

git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@1774 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02

1 files changed, 15 insertions, 0 deletions

diff --git a/asmcomp/hppa/selection.ml b/asmcomp/hppa/selection.ml
index 96fc9d376..a61c116f3 100644
--- a/asmcomp/hppa/selection.ml
+++ b/asmcomp/hppa/selection.ml
@@ -17,6 +17,7 @@ open Misc
 open Cmm
 open Reg
 open Arch
+open Proc
 open Mach
 
 let shiftadd = function
@@ -88,6 +89,20 @@ method select_operation op args =
   | _ ->
       super#select_operation op args
 
+(* Deal with register constraints *)
+
+method insert_op op rs rd =
+  match op with
+    Iintop(Idiv | Imod) -> (* handled via calls to millicode *)
+      let rs' = [|phys_reg 20; phys_reg 19|] (* %r26, %r25 *)
+      and rd' = [|phys_reg 22|] (* %r29 *) in
+      self#insert_moves rs rs';
+      self#insert (Iop op) rs' rd';
+      self#insert_moves rd' rd;
+      rd
+  | _ ->
+      super#insert_op op rs rd
+
 end
 
 let fundecl f = (new selector ())#emit_fundecl f