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authorXavier Leroy <xavier.leroy@inria.fr>1995-07-02 16:41:48 +0000
committerXavier Leroy <xavier.leroy@inria.fr>1995-07-02 16:41:48 +0000
commit48514aaca8b5b010608363a92925c7c14e91340e (patch)
tree6f7b439db0ee5847af53fedd577b3fc069b8a197 /asmcomp/proc.mli
parent081e4bf7c3a7a7bc9923f42750fe6ebce6d46d6f (diff)
Integration du generateur de code et du compilateur.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@51 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
Diffstat (limited to 'asmcomp/proc.mli')
-rw-r--r--asmcomp/proc.mli17
1 files changed, 13 insertions, 4 deletions
diff --git a/asmcomp/proc.mli b/asmcomp/proc.mli
index 0b9f7f020..71f8305fb 100644
--- a/asmcomp/proc.mli
+++ b/asmcomp/proc.mli
@@ -9,7 +9,9 @@ val select_addressing:
Cmm.expression -> Arch.addressing_mode * Cmm.expression
val select_oper:
Cmm.operation -> Cmm.expression list ->
- Mach.operation * Cmm.expression
+ Mach.operation * Cmm.expression list
+val select_store:
+ Arch.addressing_mode -> Cmm.expression -> Mach.operation * Cmm.expression
val pseudoregs_for_operation:
Mach.operation -> Reg.t array -> Reg.t array ->
Reg.t array * Reg.t array
@@ -31,14 +33,18 @@ val loc_external_arguments: Reg.t array -> Reg.t array * int
val loc_external_results: Reg.t array -> Reg.t array
val loc_exn_bucket: Reg.t
+(* Maximal register pressures for pre-spilling *)
+
+val safe_register_pressure: int
+val max_register_pressure: int array
+
(* Registers destroyed by operations *)
val destroyed_at_oper: Mach.instruction_desc -> Reg.t array
-val destroyed_at_call: Reg.t array
-val destroyed_at_extcall: Reg.t array
val destroyed_at_raise: Reg.t array
(* Reloading of instruction arguments, storing of instruction results *)
-val reload_test: (Reg.t -> Reg.t) -> Mach.test -> Reg.t array -> Reg.t array
+val reload_test:
+ (Reg.t -> Reg.t) -> Mach.test -> Reg.t array -> Reg.t array
val reload_operation:
(Reg.t -> Reg.t) -> Mach.operation -> Reg.t array -> Reg.t array ->
Reg.t array * Reg.t array
@@ -49,3 +55,6 @@ val stack_offset: int ref
val contains_calls: bool ref
val frame_size: unit -> int
val slot_offset: Reg.stack_location -> int -> int
+
+(* Calling the assembler *)
+val assemble_file: string -> string -> int