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authorXavier Leroy <xavier.leroy@inria.fr>2000-03-10 14:30:16 +0000
committerXavier Leroy <xavier.leroy@inria.fr>2000-03-10 14:30:16 +0000
commite3ceb09e79e4e6e9bceaa656afed741a36f5ab28 (patch)
tree9160193b41c9d6c2a2fe493aefc13337bfea084e /configure
parent66f61f67a8f6d6f0e641da5805970ad95ba7220e (diff)
Alpha/gcc: remplacer -taso par -Wl,-T,12000000 -Wl,-D,14000000. Cela met aussi le code dans les 4Go du bas, mais ne limite pas l'allocation dynamique a 256M comme dans le cas de -taso
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@2936 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
Diffstat (limited to 'configure')
-rwxr-xr-xconfigure12
1 files changed, 5 insertions, 7 deletions
diff --git a/configure b/configure
index 3d02f057b..b14dc3a54 100755
--- a/configure
+++ b/configure
@@ -189,8 +189,10 @@ case "$bytecc,$host" in
mathlib="";;
gcc,alpha-*-osf*)
bytecccompopts="-fno-defer-pop $gcc_warnings"
- # -taso puts code in lower 4GB
- bytecclinkopts="-Xlinker -taso";;
+ # Put code and static data in lower 4GB
+ bytecclinkopts="-Wl,-T,12000000 -Wl,-D,14000000"
+ # Tell gcc that we can use 32-bit code addresses for threaded code
+ echo "#define ARCH_CODE32" >> m.h;;
gcc*)
bytecccompopts="-fno-defer-pop $gcc_warnings";;
cc,mips-*-irix6*)
@@ -233,11 +235,7 @@ case "$2,$3" in
4,4) echo "OK, this is a regular 32 bit architecture."
echo "#undef ARCH_SIXTYFOUR" >> m.h;;
8,8) echo "Wow! A 64 bit architecture!"
- echo "#define ARCH_SIXTYFOUR" >> m.h
- case "$bytecc,$host" in
- gcc,alpha-*-osf*) echo "#define ARCH_CODE32" >> m.h;;
- *) echo "#undef ARCH_CODE32" >> m.h;;
- esac;;
+ echo "#define ARCH_SIXTYFOUR" >> m.h;;
*,8) echo "Wow! A 64 bit architecture!"
echo "Unfortunately, Objective Caml cannot work in the case"
echo "sizeof(long) != sizeof(long *)."