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| author | Kevin Hilman <khilman@linaro.org> | 2013-08-14 08:14:50 -0700 |
|---|---|---|
| committer | Kevin Hilman <khilman@linaro.org> | 2013-08-14 08:14:50 -0700 |
| commit | 080e3da4f4bf693ec59bd98eae3ee5bd5b1dd047 (patch) | |
| tree | 2a367e97dcffe9ced54ff71b03ab893a3248fdb4 /arch/arm/mm/proc-v7-3level.S | |
| parent | e91f24ae027a583f2faff84456fa2630144bfed8 (diff) | |
| parent | 39c41df9c1950fba0ee6a4e7a63be281e89fe437 (diff) | |
Merge branch 'zynq/dt' into next/dt
* zynq/dt: (1054 commits)
arm: zynq: dt: Set correct L2 ram latencies
+ v3.11-rc5
Conflicts:
arch/arm/Makefile
Diffstat (limited to 'arch/arm/mm/proc-v7-3level.S')
| -rw-r--r-- | arch/arm/mm/proc-v7-3level.S | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S index 5ffe1956c6d..01a719e18bb 100644 --- a/arch/arm/mm/proc-v7-3level.S +++ b/arch/arm/mm/proc-v7-3level.S @@ -81,7 +81,7 @@ ENTRY(cpu_v7_set_pte_ext) tst r3, #1 << (55 - 32) @ L_PTE_DIRTY orreq r2, #L_PTE_RDONLY 1: strd r2, r3, [r0] - ALT_SMP(mov pc, lr) + ALT_SMP(W(nop)) ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte #endif mov pc, lr @@ -140,8 +140,6 @@ ENDPROC(cpu_v7_set_pte_ext) mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 .endm - __CPUINIT - /* * AT * TFR EV X F IHD LR S @@ -153,5 +151,3 @@ ENDPROC(cpu_v7_set_pte_ext) .type v7_crval, #object v7_crval: crval clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c - - .previous |