diff options
| author | Chon Ming Lee <chon.ming.lee@intel.com> | 2013-09-04 01:30:38 +0800 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-09-04 17:34:58 +0200 |
| commit | 65ce4bf5a15fcd4d15898be47795d0550eb2325c (patch) | |
| tree | 3b2ce08e8e1c034921ef83dc401d0876fb13cce0 /drivers/gpu/drm/i915/intel_ringbuffer.c | |
| parent | 9dd4ffdf3936e9cd85a5c856a192134b23b4b2ac (diff) | |
drm/i915: Move Valleyview DP DPLL divisor calc to intel_dp_set_clock v2
For DP pll settings, there is only two golden configs. Instead of
running through the algorithm to determine it, hardcode the value and get it
determine in intel_dp_set_clock.
v2: Rework on the intel_limit compiler warning. (Jani)
Signed-off-by: Chon Ming Lee <chon.ming.lee@intel.com>
[danvet: Fix up checkpatch issues.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_ringbuffer.c')
0 files changed, 0 insertions, 0 deletions