diff options
Diffstat (limited to 'arch/blackfin/mach-common')
| -rw-r--r-- | arch/blackfin/mach-common/cache.S | 10 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/cacheinit.S | 4 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/cplbhdlr.S | 4 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/cplbmgr.S | 1 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/entry.S | 18 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/interrupt.S | 2 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/lock.S | 4 |
7 files changed, 40 insertions, 3 deletions
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index bb9446ef66e..8bd2af1935b 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S @@ -70,6 +70,7 @@ ENTRY(_cache_invalidate) .Lno_dcache_b: R7 = [SP++]; RTS; +ENDPROC(_cache_invalidate) /* Invalidate the Entire Instruction cache by * disabling IMC bit @@ -106,6 +107,8 @@ ENTRY(_invalidate_entire_icache) ( R7:5) = [SP++]; RTS; +ENDPROC(_invalidate_entire_icache) +ENDPROC(_icache_invalidate) /* * blackfin_cache_flush_range(start, end) @@ -129,6 +132,7 @@ ENTRY(_blackfin_icache_flush_range) IFLUSH [P0]; SSYNC; RTS; +ENDPROC(_blackfin_icache_flush_range) /* * blackfin_icache_dcache_flush_range(start, end) @@ -155,6 +159,7 @@ ENTRY(_blackfin_icache_dcache_flush_range) FLUSH [P0]; SSYNC; RTS; +ENDPROC(_blackfin_icache_dcache_flush_range) /* Throw away all D-cached data in specified region without any obligation to * write them back. However, we must clean the D-cached entries around the @@ -183,6 +188,7 @@ ENTRY(_blackfin_dcache_invalidate_range) FLUSHINV[P0]; SSYNC; RTS; +ENDPROC(_blackfin_dcache_invalidate_range) /* Invalidate the Entire Data cache by * clearing DMC[1:0] bits @@ -221,6 +227,8 @@ ENTRY(_dcache_invalidate) ( R7:6) = [SP++]; RTS; +ENDPROC(_dcache_invalidate) +ENDPROC(_invalidate_entire_dcache) ENTRY(_blackfin_dcache_flush_range) R2 = -L1_CACHE_BYTES; @@ -241,6 +249,7 @@ ENTRY(_blackfin_dcache_flush_range) FLUSH[P0]; SSYNC; RTS; +ENDPROC(_blackfin_dcache_flush_range) ENTRY(_blackfin_dflush_page) P1 = 1 << (PAGE_SHIFT - L1_CACHE_SHIFT); @@ -251,3 +260,4 @@ ENTRY(_blackfin_dflush_page) .Lfl1: FLUSH [P0++]; SSYNC; RTS; +ENDPROC(_blackfin_dflush_page) diff --git a/arch/blackfin/mach-common/cacheinit.S b/arch/blackfin/mach-common/cacheinit.S index 8c17f099e5e..7924a90d965 100644 --- a/arch/blackfin/mach-common/cacheinit.S +++ b/arch/blackfin/mach-common/cacheinit.S @@ -86,6 +86,8 @@ ENTRY(_bfin_icache_init) SSYNC; STI R2; RTS; + +ENDPROC(_bfin_icache_init) #endif #if defined(CONFIG_BLKFIN_DCACHE) @@ -134,4 +136,6 @@ ENTRY(_bfin_dcache_init) SSYNC; STI R2; RTS; + +ENDPROC(_bfin_dcache_init) #endif diff --git a/arch/blackfin/mach-common/cplbhdlr.S b/arch/blackfin/mach-common/cplbhdlr.S index b979067c49e..2f3c72c2399 100644 --- a/arch/blackfin/mach-common/cplbhdlr.S +++ b/arch/blackfin/mach-common/cplbhdlr.S @@ -42,8 +42,6 @@ .align 2 -.global __cplb_hdr; -.type __cplb_hdr, STT_FUNC; ENTRY(__cplb_hdr) R2 = SEQSTAT; @@ -128,3 +126,5 @@ ENTRY(__cplb_hdr) call _panic_cplb_error; SP += 12; JUMP _handle_bad_cplb; + +ENDPROC(__cplb_hdr) diff --git a/arch/blackfin/mach-common/cplbmgr.S b/arch/blackfin/mach-common/cplbmgr.S index f5efc4bc65e..e4b47e09cf1 100644 --- a/arch/blackfin/mach-common/cplbmgr.S +++ b/arch/blackfin/mach-common/cplbmgr.S @@ -592,6 +592,7 @@ ENTRY(_cplb_mgr) ( R7:4,P5:3 ) = [SP++]; R0 = CPLB_RELOADED; RTS; +ENDPROC(_cplb_mgr) .data .align 4; diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index 7d0368772cd..40045b1386a 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S @@ -103,6 +103,7 @@ ENTRY(_ex_dcplb) if !cc jump _return_from_exception; /* fall through */ #endif +ENDPROC(_ex_dcplb) ENTRY(_ex_icplb) (R7:6,P5:4) = [sp++]; @@ -113,6 +114,7 @@ ENTRY(_ex_icplb) RESTORE_ALL_SYS SP = RETN; rtx; +ENDPROC(_ex_icplb) ENTRY(_ex_spinlock) /* Transform this into a syscall - twiddle the syscall vector. */ @@ -123,6 +125,7 @@ ENTRY(_ex_spinlock) [p5] = r7; csync; /* Fall through. */ +ENDPROC(_ex_spinlock) ENTRY(_ex_syscall) DEBUG_START_HWTRACE @@ -131,6 +134,7 @@ ENTRY(_ex_syscall) raise 15; /* invoked by TRAP #0, for sys call */ sp = retn; rtx +ENDPROC(_ex_syscall) ENTRY(_spinlock_bh) SAVE_ALL_SYS @@ -150,12 +154,14 @@ ENTRY(_spinlock_bh) [SP + PT_R0] = R0; RESTORE_ALL_SYS rti; +ENDPROC(_spinlock_bh) ENTRY(_ex_soft_bp) r7 = retx; r7 += -2; retx = r7; jump.s _ex_trap_c; +ENDPROC(_ex_soft_bp) ENTRY(_ex_single_step) r7 = retx; @@ -191,6 +197,7 @@ _return_from_exception: ASTAT = [sp++]; sp = retn; rtx; +ENDPROC(_ex_soft_bp) ENTRY(_handle_bad_cplb) /* To get here, we just tried and failed to change a CPLB @@ -250,6 +257,7 @@ ENTRY(_ex_trap_c) SP = RETN; raise 5; rtx; +ENDPROC(_ex_trap_c) ENTRY(_exception_to_level5) SAVE_ALL_SYS @@ -314,6 +322,7 @@ ENTRY(_exception_to_level5) call _ret_from_exception; RESTORE_ALL_SYS rti; +ENDPROC(_exception_to_level5) ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/ /* Since the kernel stack can be anywhere, it's not guaranteed to be @@ -342,6 +351,7 @@ ENTRY(_trap) /* Exception: 4th entry into system event table(supervisor mode)*/ r7 = -ENOSYS; /* signextending enough */ [sp + PT_R0] = r7; /* return value from system call */ jump .Lsyscall_really_exit; +ENDPROC(_trap) ENTRY(_kernel_execve) link SIZEOF_PTREGS; @@ -396,6 +406,7 @@ ENTRY(_kernel_execve) 1: unlink; rts; +ENDPROC(_kernel_execve) ENTRY(_system_call) /* Store IPEND */ @@ -503,6 +514,7 @@ ENTRY(_system_call) r5 = [sp + PT_RESERVED]; rets = r5; rts; +ENDPROC(_system_call) _sys_trace: call _syscall_trace; @@ -531,6 +543,7 @@ _sys_trace: call _syscall_trace; jump .Lresume_userspace; +ENDPROC(_sys_trace) ENTRY(_resume) /* @@ -580,6 +593,7 @@ _new_old_task: * in "new" task. */ rts; +ENDPROC(_resume) ENTRY(_ret_from_exception) p2.l = lo(IPEND); @@ -638,6 +652,7 @@ ENTRY(_ret_from_exception) syscfg = r0; 5: rts; +ENDPROC(_ret_from_exception) ENTRY(_return_from_int) /* If someone else already raised IRQ 15, do nothing. */ @@ -680,6 +695,7 @@ ENTRY(_return_from_int) rti; 2: rts; +ENDPROC(_return_from_int) ENTRY(_lower_to_irq14) #if defined(ANOMALY_05000281) @@ -745,6 +761,7 @@ _schedule_and_signal: 1: RESTORE_CONTEXT rti; +ENDPROC(_lower_to_irq14) /* Make sure when we start, that the circular buffer is initialized properly * R0 and P0 are call clobbered, so we can use them here. @@ -758,6 +775,7 @@ ENTRY(_init_exception_buff) p0.l = _out_ptr_excause; [p0] = r0; rts; +ENDPROC(_init_exception_buff) /* * Put these in the kernel data section - that should always be covered by diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S index dd45664f0d0..b69f517a650 100644 --- a/arch/blackfin/mach-common/interrupt.S +++ b/arch/blackfin/mach-common/interrupt.S @@ -66,6 +66,7 @@ ENTRY(_evt_emulation) SP += 12; /* - GDB stub fills this in by itself (if defined) */ rte; +ENDPROC(_evt_emulation) #endif /* Common interrupt entry code. First we do CLI, then push @@ -251,3 +252,4 @@ ENTRY(_evt_system_call) #endif call _system_call; jump .Lcommon_restore_context; +ENDPROC(_evt_system_call) diff --git a/arch/blackfin/mach-common/lock.S b/arch/blackfin/mach-common/lock.S index 2cbb15b3392..386ac8dda07 100644 --- a/arch/blackfin/mach-common/lock.S +++ b/arch/blackfin/mach-common/lock.S @@ -155,6 +155,7 @@ ENTRY(_cache_grab_lock) ( R7:0,P5:0 ) = [SP++]; RTS; +ENDPROC(_cache_grab_lock) /* After the execution of critical code, the code is now locked into * the cache way. Now we need to set ILOC. @@ -186,6 +187,7 @@ ENTRY(_cache_lock) ( R7:0,P5:0 ) = [SP++]; RTS; +ENDPROC(_cache_lock) #endif /* BLKFIN_CACHE_LOCK */ @@ -193,7 +195,6 @@ ENTRY(_cache_lock) */ ENTRY(_read_iloc) - P1.H = (IMEM_CONTROL >> 16); P1.L = (IMEM_CONTROL & 0xFFFF); R1 = 0xF; @@ -202,3 +203,4 @@ ENTRY(_read_iloc) R0 = R0 & R1; RTS; +ENDPROC(_read_iloc) |